Six jumpers from an RP2040 running RISC-V Linux to a Serial Wombat PCB_0024 breakout, with values read off hw_config.h and the PIO source rather than the README.
The breakout is passive. A DE-15 socket on one end, labelled headers on the other, and the series resistors already fitted in two header columns, one for 3.3 V logic and one for 5 V. An ordinary VGA cable plugs in whole, so none of the conductor identification that a cut cable demands applies here.
| Breakout header | Signal | On-board R | Pico GPIO | Pico pin |
|---|---|---|---|---|
| R | RED | 270 Ω | GP18 | 24 |
| G | GREEN | 270 Ω | GP19 | 25 |
| B | BLUE | 270 Ω | GP20 | 26 |
| H | HSYNC | 68 Ω | GP17 | 22 |
| V | VSYNC | 68 Ω | GP16 | 21 |
| GND | GROUND | — | GND | 23 |
Ground on physical pin 23 sits between HSYNC and Red in the header, so that tie is one short jumper rather than a reach across the board.
The fitted values check out against the spec. The 3.3 V column carries 270 Ω on the colour lines and 68 Ω on the syncs. A 0.7 V peak into a 75 Ω terminated input from a 3.3 V pin needs (3.3 × 75 / 0.7) − 75 = 279 Ω, so 270 Ω sits a touch bright of nominal. The inner 5 V column uses 470 Ω, against 461 Ω from the same formula.
Only the three colour lines run at 62.5 MHz, and those are exactly the lines the breakout puts a series resistor on, into a 75 Ω terminated input. That is a well-damped line rather than a ringing stub. The syncs are unterminated but run at 31 kHz and 60 Hz. For comparison the PS/2 clock is around 15 kHz and caused no trouble at all.
So one breadboard is worth attempting. The failure mode is loud and shows up on the first boot, and the second board is a five-minute fallback rather than a rebuild.
Only VGA_R_PIN exists in hw_config.h. Green and blue are not configurable. rgb_program_init() takes the red pin as a base and hard-wires pin, pin+1 and pin+2 as one consecutive PIO output group, so moving red moves the other two with it. One bit per channel gives eight colours at 320×240, which is 640×480 line-doubled.
The 62.5 MHz figure is not a guess either. The PIO clock divider is system frequency over 62500, and the RP2040 here runs overclocked at 400 MHz.
None of this needs a firmware change. CONSOLE_VGA has been enabled since the boards-v4 release, so the PIO program and its two DMA channels have been driving those pins into open air for weeks. Attaching the cable turns on no new code path.
Kept in case the board disappoints, or a second display is wanted later. None of this is needed for the PCB_0024 path.
| DE-15 | Signal | Goes to |
|---|---|---|
| 1 2 3 | R G B | 270 Ω each, then GP18 / GP19 / GP20 |
| 13 14 | HSYNC VSYNC | GP17 / GP16, no resistor required |
| 5 6 7 8 10 | GROUNDS | One bus. 6, 7 and 8 are the R/G/B coax shields |
| 4 9 11 12 15 | UNUSED | Snip and tape off, DDC included |
Without the DDC pair on 12 and 15 the monitor cannot read an EDID and falls back to default timings, which is exactly what you want here.
Work backwards from the connector instead of sweeping every wire against every pin. Put one meter lead on a DE-15 pin and sweep the conductors until one buzzes, then move to the next pin. You only care about 1, 2, 3, 6, 7, 8, 10, 13 and 14.
Colour means nothing here. VGA cable colours are no more standardised than the keyboard's were, and that cable turned out to use red for data rather than power.
The same approach that worked for the keyboard, with three changes that matter more on this cable.